Episode Details

## Episode Summary In this episode, we cover: - **CacheFit: The Rising Cost of Cache Replacement and Constraint-Driven Redesign of Last-Level Cache Replacement Policies** (arXiv) - **CXDVirt: Low Latency Kernel Module Based CXL-SSD Emulation** (arXiv) - **Nuvia’s Architects Now Preparing a CPU for Arm, RISC-V or x86 - HWCooling.net** (google_riscv) - **Openchip unveils BER10 RISC-V processor as Europe pursues greater digital sovereignty - New Electronics** (google_riscv) - **Enabling Comprehensive CWE-based Assurance for RISC-V Processors - Semiconductor Engineering** (google_riscv) --- *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*