Episode Details
Back to EpisodesSelective KV Cache Protection for Noise-Resilient LLM Inference on Analog Compute-In-Memory Systems
Published 2 months, 1 week ago
Description
## Episode Summary
In this episode, we cover:
- **Selective KV Cache Protection for Noise-Resilient LLM Inference on Analog Compute-In-Memory Systems** (arXiv)
- **WitCert: Sound Runtime Risk Observability and Gating for KV-Cache Quantization** (arXiv)
- **Evaluating and Calibrating Performance On RISC-V Vector Processors (KTH, LLNL, BSC) - Semiconductor Engineering** (google_riscv)
- **RISC-V Mentorship Taught Me the RISC-V ISA Is Far More Than a Reference Manual** (riscv_news)
- **Zhihe A210 octa-core RISC-V SoC with 12 TOPS NPU powers SoM-based development board - cnx-software.com** (google_riscv)
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*Sponsored by Ada, Ago Consulting, and Zen Semiconductor*