Episode Details
Back to EpisodesA Photonic-CXL Memory Appliance for Scalable KV Cache Management in LLM Inference
Published 2 months, 1 week ago
Description
## Episode Summary
In this episode, we cover:
- **A Photonic-CXL Memory Appliance for Scalable KV Cache Management in LLM Inference** (arXiv)
- **SPARC: Automated Root-Cause Analysis of Pre-Silicon Power Side-Channel Leakage in the Processor Design Flow** (arXiv)
- **RISC-V Targets Data Centers as Open ISA Pushes Beyond Embedded Systems - eetasia.com** (google_riscv)
- **Openchip unveils BER10 RISC-V processor as Europe pursues greater digital sovereignty - New Electronics** (google_riscv)
- **AI is stress-testing processor architectures and RISC-V fits the moment - EDN - Voice of the Engineer** (google_riscv)
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*Sponsored by Ada, Ago Consulting, and Zen Semiconductor*